1. Technical Field
The present invention relates to a multi-processor system and a program for causing a computer to execute a controlling method of an interruption of the multi-processor system, and specifically to a multi-processor system that processes programs in parallel while accepting interruption processing from external devices and a program for causing a computer to execute a controlling method of an interruption of the multi-processor system.
2. Related Art
The processor used for a specific device is called a built-in system. Recently, a multi-processor or a multi-thread processor is used for a built-in system. The multi-processor is advantageously used to make the device have fewer clocks or improve the responsiveness of the device. It is desirable to use a multi-processor in a portable device in particular, as the multi-processor is also advantageous in reducing power consumption.
The determination of whether a newly developed processor operates normally or not takes time and cost. For that reason, in the field of software, if a processor that has been used and proved its good performance can be diverted, it is desirably diverted. When the built-in system is used as a multi-processor, it is requested to divert software of a previously used single processor.
A conventional technique for diverting a single processor for a multi-processor is described in JP-A-8-297581 (hereinafter referred to as patent document 1), for example. The invention of the patent document 1 is for transporting an OS (Operating System) for a single processor based on μITRON (registered trademark) to a multi-processor.
In a single processor, however, a processor is set to interruption prohibition at a task side, while a processor executes a program by a predetermined unit (task). In the single processor, an interruption during execution of processing may be prohibited in an interruption whose interruption level is relatively low. In the single processor, when a service call for calling an OS is issued, an interruption needs to be prohibited during the entire period from issuing a service call to releasing an OS.
If the above mentioned specification is diverted for a multi-processor, the multi-processor cannot execute an interruption and task processing in parallel even when the multi-processor has a plurality of processor units. As a time period in which an interruption enters into a waiting state occurs whatever its priority is, there is a problem in that efficiency of a program decreases.
FIG. 11 is diagram illustrating a conventional technique in which an interruption enters in a waiting state. The task sets interruption prohibition to the processor to prevent itself from being interrupted by a task with a higher priority or an interruption during the task with a low priority. As a result, the following task or interruption is kept waiting until the task with lower priority ends without being activated.
The present invention is adapted in view of the problems and intends to provide a multi-processor system that enables parallel processing of a task and an interruption in a multi-processor system and shortens a waiting time of a task or the like for higher efficiency of parallel processing and a program for causing a computer to execute a controlling method of an interruption of the multi-processor system.